DocumentCode :
1103568
Title :
VIA-7 p-channel GaAs SIS FET self-aligned by ion-implantation
Author :
Matsumoto, Kaname ; Ogura, M. ; Wada, Tomotaka ; Yao, Tingfeng ; Hayashi, Yasuhiro ; Hashizume, Nobuya ; Kato, Masaaki ; Endo, T. ; Yamazaki, Hiroshi ; Inage, H. ; Yamada, Makoto
Volume :
32
Issue :
11
fYear :
1985
fDate :
11/1/1985 12:00:00 AM
Firstpage :
2553
Lastpage :
2553
Keywords :
Avalanche breakdown; Electrodes; FETs; Filling; Gallium arsenide; Indium phosphide; Insulation; Leakage current; MESFETs; Threshold voltage;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1985.22375
Filename :
1485121
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=1103568
