An analytical a-Si:H TFT DC/capacitance model using an effective temperature approach for deriving a switching time model for an inverter circuit considering deep and tail states

Author

Chen, Shiao-Shien ; Kuo, James B.

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

41

Issue

7

fYear

1994

fDate

7/1/1994 12:00:00 AM

Firstpage

1169

Lastpage

1178

Abstract

This paper presents an analytical a-Si:H DC/capacitance model using an effective temperature approach for deriving a switching time model for an inverter circuit considering deep and tail states. Using an effective temperature approach, the localized deep and tail states have been considered in the DC/capacitance model and the switching time model. As verified by the published data, the analytical DC/capacitance model provides an accurate prediction. Based on the analytical model, the threshold voltage of an a-Si:H TFT is proportional to the deep state density and the switching time of the TFT-inverter is dependent on the tail state density

Keywords

amorphous semiconductors; capacitance; deep levels; elemental semiconductors; hydrogen; logic gates; semiconductor device models; semiconductor switches; silicon; thin film transistors; DC model; DC/capacitance model; Si:H; a-Si:H TFT; analytical model; capacitance model; deep state density; deep states; effective temperature approach; inverter circuit; localized states; switching time; switching time model; tail state density; tail states; threshold voltage; Analytical models; Capacitance; Data analysis; Inverters; Predictive models; Switching circuits; Tail; Temperature; Thin film transistors; Threshold voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.293344

Filename

293344