DocumentCode :
1103814
Title :
A performance comparison of two p-i-n FET receiver circuit architectures
Author :
Teare, M.J. ; Ulbricht, L.W.
Author_Institution :
GTE Laboratories, Inc., Waltham, MA
Volume :
32
Issue :
12
fYear :
1985
fDate :
12/1/1985 12:00:00 AM
Firstpage :
2699
Lastpage :
2703
Abstract :
Two conceptually different p-i-n FET receiver circuit architectures are evaluated using a SPICE circuit simulation. The popular p-i-n FET transimpedance amplifier is compared to a new architecture that uses distributed gain and dual feedback. To highlight the importance of circuit architecture to receiver performance, identical device parameters are used in each circuit model. Frequency, phase, and pulse responses are computed and presented in graphical form. Results demonstrate that the popular receiver is adversely sensitive to FET transconductance variations and distorts the pulse reponse, whereas the distributed gain and dual feedback design is substantially independent of transistor parameters and free of pulse distortion.
Keywords :
Circuit simulation; Computer architecture; Distributed amplifiers; FETs; Feedback; Frequency; PIN photodiodes; Pulse amplifiers; SPICE; Transconductance;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/T-ED.1985.22401
Filename :
1485147
Link To Document :
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