Coding Techniques for Failure- Tolerant Counters

This paper delineates an application of two classes of parity-check codes to the design for failure-tolerant counters. They are 1) a modified first-order Reed-Muller code and 2) the perfect Hamming code. The first code employs a majority element for implementing the error-correcting scheme while the second one makes use of a variable 2j-2+1-out-of-2j-1+1 majority element. These coding techniques can be applied in principle to other logic hardware to increase its reliability.