Developing linear error models for analog devices

Author

Stenbakken, Gerard N. ; Souders, T. Michael

Author_Institution

Nat. Inst. of Stand. & Technol., Gaithersburg, MD, USA

Volume

43

Issue

2

fYear

1994

fDate

4/1/1994 12:00:00 AM

Firstpage

157

Lastpage

163

Abstract

Techniques are presented for developing linear error models for analog and mixed-signal devices. A simulation program developed to understand the modeling process is described, and results of simulations are presented. Methods for optimizing the size of empirical error models based on simulated error analyses are included. Once established, the models can be used in a comprehensive approach for optimizing the testing of the subject devices. Models are developed using data from a group of 13-bit A/D converters and compared with the simulation results

Keywords

analogue circuits; analogue-digital conversion; circuit analysis computing; digital simulation; electron device testing; error analysis; mixed analogue-digital integrated circuits; 13-bit A/D converters; NIST; analog devices; decomposition model; empirical error models; linear error model; mixed-signal devices; optimisation; simulated error analyses; simulation program; testing; Analytical models; Costs; Error analysis; NIST; Optimization methods; Parameter estimation; Predictive models; Production; Testing; Vectors;

fLanguage

English

Journal_Title

Instrumentation and Measurement, IEEE Transactions on

Publisher

ieee

ISSN

0018-9456

Type

jour

DOI

10.1109/19.293413

Filename

293413