DocumentCode :
1104241
Title :
A direct measurement technique for small geometry MOS transistor capacitances
Author :
Weng, K.C.-K. ; Yang, P.
Author_Institution :
Texas Instruments, Inc., Dallas, TX, USA
Volume :
6
Issue :
1
fYear :
1985
fDate :
1/1/1985 12:00:00 AM
Firstpage :
40
Lastpage :
42
Abstract :
Accurate representation of MOS transistor capacitances is important for accurate circuit simulation. Due to the difficulties of direct measurement with meters, MOS intrinsic capacitances have not been studied extensively. Although several "on-chip" methods have been developed, the need for measurement circuits fabricated alongside the devices of interest seems to be impractical for statistical data generation. In addition, the characterization of both current-voltage ( I-V ) and capacitance-voltage (CV) relationships is not as convenient by using the "on-chip" configurations. Consequently, the direct measurement technique is more desirable than the "on-chip" methods. A direct measurement technique for the intrinsic gate capacitances in a small geometry MOS transistor has been developed and is presented in this letter. By using this method, n-channel transistors with W_{eff}/L_{eff} of, 11/11, 11/2.2, and 11/1.65 µm have been measured. The difference between the long- and short-channel devices can be clearly observed in the measured curves. The results show that the small MOSFET intrinsic capacitances can be accurately determined using off the self meters, and the use of "on-chip" circuitry is unnecessary.
Keywords :
Capacitance measurement; Capacitance-voltage characteristics; Capacitors; Circuit simulation; Geometry; MOSFETs; Measurement techniques; Parasitic capacitance; Semiconductor device measurement; Semiconductor process modeling;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/EDL.1985.26035
Filename :
1485188
Link To Document :
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