Fabrication of NMOS capacitors with a low-voltage coefficient at a silicon foundry

The custom integrated circuit design technique pioneered by Mead and Conway [1] is often used for moderately complex digital systems. The fabrication is carried out at a "foundry" where a "standard" NMOS process is applied to the design. In this note, the Mead-Conway technique has been applied to analog circuits with the goal of producing a reasonable quality switched capacitor filter with as few process modifications as possible. Seven chip runs have been carried out at two separate foundries with good and consistent results.