DocumentCode
1104817
Title
High-speed 32-bit buses for forward-looking computers
Author
Borrill, Paul L.
Author_Institution
Nat. Semicond. Corp., Santa Clara, CA, USA
Volume
26
Issue
7
fYear
1989
fDate
7/1/1989 12:00:00 AM
Firstpage
34
Lastpage
37
Abstract
The features offered by current high-performance 32-bit system buses are examined. They allow multiprocessing, scalability, block transfers to RAM, cache coherence, and autoconfiguration (the ability to poll boards connected to them, identify the boards, and adjust the software interface accordingly). The factors that need to be taken into account when designing these buses are considered, and their performance and limitations are discussed.<>
Keywords
computer interfaces; 32 bit; 32-bit system buses; RAM; autoconfiguration; block transfers; cache coherence; computer interfaces; multiprocessing; performance; scalability; software interface; Computer architecture; Costs; Investments; Power generation; Printed circuits; Reduced instruction set computing; Scalability; Spine; Sun; System buses;
fLanguage
English
Journal_Title
Spectrum, IEEE
Publisher
ieee
ISSN
0018-9235
Type
jour
DOI
10.1109/6.29347
Filename
29347
Link To Document