DocumentCode
1104899
Title
Biresidue Error-Correcting Codes for Computer Arithmetic
Author
Rao, Thammavarapu R.N.
Author_Institution
IEEE
Issue
5
fYear
1970
fDate
5/1/1970 12:00:00 AM
Firstpage
398
Lastpage
402
Abstract
In an earlier paper [11] a scheme for detecting errors in ADD, COMPLEMENT, SHIFT, and ROTATE operations using a residue check circuitry was presented. A scheme for error location and correction in those operations is derived by a suitable application of a code called biresidue arithmetic code described here. Any single error position can be located and also corrected by use of two residue checkers which work separately and in parallel with the arithmetic unit. The estimated cost of redundancy is approximately the same as that required for duplication of the arithmetic unit.
Keywords
Biresidue codes, multiresidue codes, residue codes, self-correcting computers, separate and nonseparate residue codes, syndrome, syndrome decoder.; Application software; Circuits; Computer errors; Computerized monitoring; Costs; Decoding; Digital arithmetic; Error correction; Error correction codes; Redundancy; Biresidue codes, multiresidue codes, residue codes, self-correcting computers, separate and nonseparate residue codes, syndrome, syndrome decoder.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/T-C.1970.222937
Filename
1671530
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