DocumentCode :
1105380
Title :
Submicrometer device design for hot-electron reliability and performance
Author :
Hui, J. ; Moll, J.
Author_Institution :
Hewlett Packard Laboratories, Palo Alto, CA
Volume :
6
Issue :
7
fYear :
1985
fDate :
7/1/1985 12:00:00 AM
Firstpage :
350
Lastpage :
352
Abstract :
Hot-electron stressing effect on different lightly doped drain device (LDD), As/P, and conventional As source/drain device structures are investigated. Increasing the overlap between the gate and drain is found to reduce hot-electron degradation significantly when stressed under the same substrate current level. By increasing the gate-to-drain overlap, it is possible to design LDD and As/P devices with a shorter n-region and still have good hot-electron reliability. These devices have better current drive and are scalable down to the submicrometer region. The As/P device with a short n-region is a good candidate for a submicrometer VLSI device because of the simplicity in processing, the good device performance, and the low susceptibility to hot-electron degradation.
Keywords :
Anisotropic magnetoresistance; Current measurement; Degradation; Electric breakdown; Electrons; Etching; MOS devices; Stress measurement; Very large scale integration; Voltage;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/EDL.1985.26151
Filename :
1485304
Link To Document :
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