Cell geometry effect on IGT latch-up

The effect of the emitter cell geometry on insulated gate transistor (IGT) performance has been investigated. The three-dimensional well resistances (emitter shunting resistance) of the square, circular, stripe, and multiple surface short (MSS) have been calculated. The MSS cell geometry has the lowest emitter shunting resistance. As a result, MSS cell has the highest latch-up current capability. It has been experimentally proven that the stripe cell has extremely high latch-up current, and the MSS cell design is current limited. The IGT´s with circular and square cell have the lowest latch-up current capability.