Stability of Amorphous-Silicon and Nanocrystalline Silicon Thin-Film Transistors Under DC and AC Stress

Author

Hatzopoulos, A.T. ; Arpatzanis, N. ; Tassis, D.H. ; Dimitriadis, C.A. ; Templier, F. ; Oudwan, M. ; Kamarinos, G.

Author_Institution

Aristotle Univ., Thessaloniki

Volume

28

Issue

9

fYear

2007

Firstpage

803

Lastpage

805

Abstract

Bottom-gated n-channel thin-film transistors (TFTs) were fabricated using hydrogenated amorphous-silicon (a-Si:H)/ nanocrystalline silicon (nc-Si:H) bilayers as channel materials, which are deposited by plasma-enhanced chemical vapor deposition at low temperatures. The stability of these devices is investigated under static and dynamic bias stress conditions. For comparison, the stability of a-Si:H and nc-Si:H single-layer TFTs is investigated under similar bias stress conditions. The overall results demonstrate that the a-Si:H/nc-Si:H bilayer TFTs are superior compared with their counterparts of a-Si:H and nc-Si:H TFTs regarding device performance and stability.

Keywords

plasma CVD coatings; silicon; thin film transistors; AC stress; DC stress; Si - Element; bottom-gated n-channel thin-film transistor; hydrogenated amorphous-silicon; nanocrystalline silicon thin-film transistor; plasma-enhanced chemical vapor deposition; Active matrix liquid crystal displays; Dielectric materials; Leakage current; Plasma chemistry; Plasma devices; Plasma temperature; Silicon; Stability; Stress; Thin film transistors; Amorphous-silicon (a-Si); nanocrystalline silicon (nc-Si); stability; thin-film transistors (TFTs);

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2007.902619

Filename

4294055