Use of a TiN barrier to improve GaAs FET ohmic contact reliability

We have used a reactively sputtered TiN diffusion barrier to prevent interpenetration of a (Ni)GeAuPt ohmic contact layer and Ti/Pt/Au overlay on GaAs devices baked at 250-300°C in air. Planar GaAs MESFET´s and TLM patterns were fabricated and iteratively tested and baked. Devices without TiN showed severe degradation in morphology and dc and RF performance. Devices with TiN remained essentially unchanged.