DocumentCode
1105709
Title
Use of a TiN barrier to improve GaAs FET ohmic contact reliability
Author
Remba, R.D. ; Suni, I. ; Nicolet, M.A.
Author_Institution
Watkins Johnson Co., Palo Alto, CA
Volume
6
Issue
8
fYear
1985
fDate
8/1/1985 12:00:00 AM
Firstpage
437
Lastpage
438
Abstract
We have used a reactively sputtered TiN diffusion barrier to prevent interpenetration of a (Ni)GeAuPt ohmic contact layer and Ti/Pt/Au overlay on GaAs devices baked at 250-300°C in air. Planar GaAs MESFET´s and TLM patterns were fabricated and iteratively tested and baked. Devices without TiN showed severe degradation in morphology and dc and RF performance. Devices with TiN remained essentially unchanged.
Keywords
Degradation; FETs; Gallium arsenide; Gold; MESFETs; Morphology; Ohmic contacts; Radio frequency; Testing; Tin;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/EDL.1985.26182
Filename
1485335
Link To Document