• DocumentCode
    1105873
  • Title

    Integration of screen-printing and rapid thermal processing technologies for silicon solar cell fabrication

  • Author

    Doshi, P. ; Mejia, J. ; Tate, K. ; Rohatgi, A.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • Volume
    17
  • Issue
    8
  • fYear
    1996
  • Firstpage
    404
  • Lastpage
    406
  • Abstract
    For the first time, the potentially cost-effective technologies of rapid thermal processing (RTP) and screen-printing (SP) have been combined into a single process sequence to achieve solar cell efficiencies as high as 14.7% on 0.2 /spl Omega/-cm FZ and 14.8% on 3 /spl Omega/-cm Cz silicon. These results were achieved without application of a nonhomogeneous (selective) emitter, texturing, or oxide passivation. By tailoring the RTP thermal cycles for emitter diffusion and firing of the screen-printed silver contacts, fill factor values >0.79 were realized on emitters with a sheet resistance (/spl rho//sub s/) of /spl sim/20 /spl Omega///spl square/ and grid shading <6%. Such high fill factors clearly demonstrate that screen-printed contacts can be fired on extremely shallow RTP emitters (x/sub j/=0.25-0.3 μm) without shunting cells. IQE analysis depicts a strong preference for shallow emitter junction depths to achieve optimal short wavelength response of these unpassivated emitters. In some cases, front contacts were printed through plasma enhanced chemical vapor deposited (PECVD) SiN/SiO2 dielectrics which prevented the shunting of shallow emitters by serving as partial barriers minimizing the diffusion of metallic species from the contacts. The firing of screen-printed contacts through these PECVD films, achieved the multiple purposes of contact formation, efficient front surface passivation due to annealing of the SiN, and high quality antireflection (AR). Research is presently underway to further optimize the RTP emitter design for screen-printing and develop techniques for implementing selective emitter and oxide passivation technologies for higher efficiency cells.
  • Keywords
    elemental semiconductors; passivation; plasma CVD; rapid thermal processing; semiconductor device metallisation; semiconductor technology; silicon; solar cells; 14.7 percent; 14.8 percent; Ag; Cz Si; FZ Si; PECVD SiN/SiO/sub 2/ dielectrics; PECVD films; RTP thermal cycles; Si; Si solar cell fabrication; SiN-SiO/sub 2/; annealing; antireflection; chemical vapor deposition; cost-effective technologies; emitter diffusion; fill factors; front surface passivation; high efficiency cells; optimal short wavelength response; partial barriers; plasma enhanced CVD; rapid thermal processing; screen-printed Ag contact firing; screen-printing; shallow emitter junction depths; unpassivated emitters; Contact resistance; Firing; Passivation; Photovoltaic cells; Plasma chemistry; Rapid thermal processing; Silicon compounds; Silver; Thermal factors; Thermal resistance;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/55.511589
  • Filename
    511589