• DocumentCode
    1105970
  • Title

    Effects of architecture implementation on DFT algorithm performance

  • Author

    Mehalic, Mark A. ; Rustan, Pedro L. ; Route, Gary P.

  • Author_Institution
    Test Wing, Elgin AFB, FL
  • Volume
    33
  • Issue
    3
  • fYear
    1985
  • fDate
    6/1/1985 12:00:00 AM
  • Firstpage
    684
  • Lastpage
    693
  • Abstract
    Five major DFT algorithms were evaluated on seven different computers. The relative performances of these algorithms were related to the architecture of each computer by finding a relationship between the execution time and the instruction counts. The relative performance of these algorithms on other computers is predicted, based on the knowledge of the computer architecture. On certain implementations, data transfers are more important than floating-point additions and multiplications when comparing DFT algorithms. On the average, data transfers account for a greater percentage of the execution time than floating-point operations,
  • Keywords
    Algorithm design and analysis; Assembly; Computer aided instruction; Computer architecture; Military computing; Radio access networks; Testing;
  • fLanguage
    English
  • Journal_Title
    Acoustics, Speech and Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0096-3518
  • Type

    jour

  • DOI
    10.1109/TASSP.1985.1164593
  • Filename
    1164593