• DocumentCode
    1106004
  • Title

    Interconnection of High-Speed Logic Circuits

  • Author

    Janisz, T. ; Martin, R.C.

  • Author_Institution
    IEEE
  • Issue
    9
  • fYear
    1970
  • Firstpage
    831
  • Lastpage
    837
  • Abstract
    The design of present-day logic systems, using circuits with transition times approaching 1 ns, meets with problems unless the transmission lines are properly terminated. It is very inconvenient to match the input and output of a logic circuit to the characteristic impedance of a transmission line, even at the cost of considerable distortion. An alternative method is to use lines of less than 5-cm length to reduce the distortion. However, many applications require longer lines, and some applications also require interconnecting logic circuits at various points along the line. This short note considers a method of dealing with this multiple problem using frequency domain, time domain, and experimental analysis.
  • Keywords
    Characteristic impedance, frequency domain, gateloaded line, reflections, simulated loaded line, time domain.; Character generation; Distributed parameter circuits; Frequency domain analysis; Impedance; Integrated circuit interconnections; Logic circuits; Reflection; Time domain analysis; Transmission lines; Voltage; Characteristic impedance, frequency domain, gateloaded line, reflections, simulated loaded line, time domain.;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/T-C.1970.223049
  • Filename
    1671642