A novel scheme for protection of power semiconductor devices against short circuit faults

Power semiconductor devices find wide application in modern power electronic converters. Protection of these devices against overload/short circuit conditions is of paramount importance. Present day protection topologies employing different circuits have invariably one main drawback in that the fault current reaches the set value before action is initiated to trip the system. This poses a severe stress on the device. Hence an adequate safety margin has to be necessarily provided to prevent excessive device stresses and care has to be taken to see that the device is operated well within its safe operating areas. The present paper proposes a method wherein the slope or rate of rise of the fault current is detected and once the slope exceeds the set reference, action is initiated to trip the system much before the fault current reaches dangerous levels. The method provides a fast means of detection of overload and short circuit currents and can be conveniently adopted for the protection of devices in power transistor/IGBT based inverters against short circuited load conditions or shoot through faults. The possible reduction of stresses in the power devices are also highlighted