Abstract :
It has been shown that plasma immersion ion implantation (PIII)/plasma doping (PLAD) processing offers unique advantages over conventional beam-line ion implant systems, including system simplicity, lower cost, higher throughput, and device performance improvements. A 78-nm channel length PMOS device, which is fabricated by a B2H6/H2 PIII/PLAD process on source/drain doping, can offer better device performance that includes a 50% lower contact resistance (RCS), 11%-16% higher drive current (IDS), and transconductance (KL) than those fabricated by beam-line implantation. The physical mechanisms behind the device performance improvement can be correlated to the much lower RCS, which in turn results from the unique dopant profiles of the PIII/PLAD process.
Keywords :
MOSFET; boron compounds; doping profiles; hydrogen; plasma immersion ion implantation; semiconductor doping; B2H6 - Interface; MOSFET; PIII processing; PLAD processing; PMOS devices; beam-line implantation; beam-line ion implant systems; device performance improvement; plasma doping processing; plasma immersion ion implantation processing; semiconductor doping; size 78 nm; source/drain doping; Contact resistance; Costs; Doping; Implants; MOS devices; Plasma devices; Plasma immersion ion implantation; Plasma materials processing; Throughput; Transconductance; Device electrical performance; dopant profiles; plasma doping (PLAD); plasma immersion ion implantation (PIII); throughput;
