DocumentCode
1107568
Title
Design and characteristics of a lightly doped drain (LDD) device fabricated with self-aligned titanium disilicide
Author
Lai, Fang-Shi J. ; Sun, Jack Yuan-Chen ; Dhong, Sang H.
Author_Institution
IBM General Product Division, San Jose, CA
Volume
33
Issue
3
fYear
1986
fDate
3/1/1986 12:00:00 AM
Firstpage
345
Lastpage
353
Abstract
An As-P double-diffused lightly doped drain (LDD) device has been designed and fabricated with a self-aligned titanium disilicide process. The device design was aided by using an analytical one-dimensional model, and analytic results agree well with experimental data on the avalanche breakdown voltage gain and the ratio of substrate current to source current. Threshold voltage and subthreshold characteristics of this device do not deviate from those of a conventional device without LDD and silicide. The drain avalanche breakdown voltage of the LDD device is higher by 2.5 V over the conventional device. Transconductance degradation was observed for the LDD devices due to the inherently high source-drain series resistance of the LDD structure. Substrate current is reduced and hot-electron reliability is greatly improved. The titanium disilicide process effectively reduces the sheet resistances of the source-drain diffusion and the polysilicon gate to 3 Ω/sq compared with 150 Ω/sq of the unsilicided counterparts. It is also found that larger polysilicon grain size increases the sheet resistance of the silicide gate due to discontinuous titanium disilicide formation on top of polysilicon.
Keywords
Analytical models; Avalanche breakdown; Breakdown voltage; Degradation; Grain size; Process design; Silicides; Threshold voltage; Titanium; Transconductance;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1986.22493
Filename
1485710
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