Title :
A new testing method for EEPLA
Author :
Rajsuman, Rochit
Author_Institution :
Dept. of Comput. Eng. & Sci., Case Western Reserve Univ., Cleveland, OH, USA
fDate :
7/1/1994 12:00:00 AM
Abstract :
A testing method for EEPLA´s is presented. The method requires small amount of extra hardware and provides complete fault coverage. This method exploits the fact that each crosspoint can be reprogrammed in EEPLA. To our knowledge, this is the first algorithmic test method applicable to EEPLA´s. In the proposed approach, all single and multiple crosspoint faults, stuck-at faults, and bridging faults are detectable. The test set is simple and is easy to derive
Keywords :
automatic testing; combinatorial circuits; fault location; integrated circuit testing; logic arrays; logic testing; EEPLA; algorithmic test method; bridging faults; electrically erasable PLAs; fault coverage; multiple crosspoint faults; single crosspoint fault; stuck-at faults; test set; Circuit faults; Cost function; Fault detection; Fuses; Hardware; Logic arrays; Logic design; Programmable logic arrays; Switches; Testing;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
