Title :
State Assignments for Asynchronous Sequential Machines
Author_Institution :
IEEE
fDate :
4/1/1971 12:00:00 AM
Abstract :
In this paper, a heuristic state assignment algorithm for asynchronous sequential machines is presented. Machines realized by this assignment scheme will result in circuits having a small amount of gate inputs and operating in single transition time. It is also shown that for a flow table having m1input columns, m input variables, and d stable states, the number of gate inputs required for a single transition time realization is bounded by d(m1+m+1).
Keywords :
Asynchronous sequential machines, logic circuit realizations, single transition time sequential circuit realizations.; Counting circuits; Hazards; Heuristic algorithms; Input variables; Latches; Logic circuits; Process design; Sequential circuits; Sufficient conditions; Switching circuits; Asynchronous sequential machines, logic circuit realizations, single transition time sequential circuit realizations.;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/T-C.1971.223253
