Title :
Auto-tuned counter synchronisation in FPGA-based interpolation time digitisers
Author_Institution :
Fac. of Electron., Mil. Univ. of Technol., Warsaw
Abstract :
A novel method for auto-tuned synchronisation of the counter in interpolation time digitisers is described. A clock phase adjustment is utilised to avoid the metastability effect in the counter and to achieve the highest possible operating frequency in a given technology.
Keywords :
analogue-digital conversion; circuit tuning; counting circuits; field programmable gate arrays; interpolation; synchronisation; FPGA-based interpolation time digitiser; auto-tuned counter synchronisation; clock phase adjustment; counter metastability effect; counter operating frequency;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2009.3362
