• DocumentCode
    1108084
  • Title

    Auto-tuned counter synchronisation in FPGA-based interpolation time digitisers

  • Author

    Szplet, R.

  • Author_Institution
    Fac. of Electron., Mil. Univ. of Technol., Warsaw
  • Volume
    45
  • Issue
    13
  • fYear
    2009
  • Firstpage
    671
  • Lastpage
    672
  • Abstract
    A novel method for auto-tuned synchronisation of the counter in interpolation time digitisers is described. A clock phase adjustment is utilised to avoid the metastability effect in the counter and to achieve the highest possible operating frequency in a given technology.
  • Keywords
    analogue-digital conversion; circuit tuning; counting circuits; field programmable gate arrays; interpolation; synchronisation; FPGA-based interpolation time digitiser; auto-tuned counter synchronisation; clock phase adjustment; counter metastability effect; counter operating frequency;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el.2009.3362
  • Filename
    5117384
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1108084