DocumentCode
1108125
Title
Complex DC-offset cancellation circuit
Author
Jang, Y.S. ; Lee, J.S. ; Lee, S.G. ; Ko, J.H.
Author_Institution
U-Radio Lab., KAIST, Daejeon
Volume
45
Issue
13
fYear
2009
Firstpage
677
Lastpage
678
Abstract
A novel DC-offset cancellation circuit that is applicable to complex filters is presented. The proposed circuit allows for a high-gain complex filter, which leads to a small chip size and low current consumption. Adopting the proposed scheme, a 10 to 73 dB gain complex filter that cancels an input referred DC-offset by more than plusmn100 mV is designed based on 0.18 mum CMOS technology, which dissipates 2.4 mA from a 1.8 V supply.
Keywords
CMOS integrated circuits; filters; CMOS technology; chip size; complex DC-offset cancellation circuit; current 2.4 mA; high-gain complex filter; size 0.18 mum; voltage 1.8 V;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el.2009.0843
Filename
5117388
Link To Document