Title :
Three-dimensional interconnect for multilayer module packages with selectively anodised aluminium substrate
Author :
Yeo, S.K. ; Kwon, Y.S.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol. (KAIST), Daejeon
Abstract :
It is reported that 3-D interconnects fabricated with a selectively anodised aluminium process for a multilayer module package can be used to evaluate high-frequency performance. The proposed method of fabricating vertical interconnects is easier and more cost-effective than other RF MEMS processes. To transfer RF signals vertically, coaxial hermetic seal vias with characteristic 50 Omega impedances and embedded anodised aluminium vias with a solder ball attachment and flip-chip bonding were used. The optimised interconnect structure demonstrated RF characteristics with an insertion loss of less than 1.55 OmegadB and a return loss of less than 12.25 OmegadB over a broad bandwidth ranging from 0.1 to 10 OmegaGHz. Experimental results suggest that the developed technology, which is based on selectively anodised aluminium, can be applied to new 3-D packaging solutions.
Keywords :
bonding processes; chip scale packaging; flip-chip devices; hermetic seals; integrated circuit interconnections; solders; 3D packaging; 3D vertical interconnect fabrication; Al; RF signal characteristics; coaxial hermetic seal; flip-chip bonding; multilayer module package; optimised interconnect structure; resistance 50 ohm; selectively anodised aluminium substrate; solder ball attachment;
Journal_Title :
Electronics Letters
DOI :
10.1049/el.2009.3588