DocumentCode :
1108718
Title :
A Heuristic Algorithm for the Testing of Asynchronous Circuits
Author :
Putzolu, Gianfranco R. ; Roth, J. Paul
Author_Institution :
IEEE
Issue :
6
fYear :
1971
fDate :
6/1/1971 12:00:00 AM
Firstpage :
639
Lastpage :
647
Abstract :
This paper describes an algorithm for the computation of tests to detect failures in asynchronous sequential logic circuits. It is based upon an extension of the D-algorithm [1]. Discussion of experience with a program of the procedure is given.
Keywords :
Circuit testing, D-algorithm, diagnosis, LSI, simulation, test generation.; Asynchronous circuits; Circuit simulation; Circuit testing; Clocks; Heuristic algorithms; Large scale integration; Logic circuits; Logic testing; Sequential analysis; Sequential circuits; Circuit testing, D-algorithm, diagnosis, LSI, simulation, test generation.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/T-C.1971.223315
Filename :
1671908
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=1108718
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