Title :
Dynamic Slew Enhancement Technique for Improving Transient Response in an Adaptively Biased Low-Dropout Regulator
Author :
Maity, Ashis ; Patra, Amit
Author_Institution :
Adv. Technol. Dev. Center, Indian Inst. of Technol. Kharagpur, Kharagpur, India
Abstract :
This brief presents a dynamic slew enhancement technique for improving the transient response in an adaptively biased low-dropout regulator. This is done by introducing FAST and SLOW paths in an adaptive bias loop. The FAST path injects a quick momentary current during a low-to-high load transient, whereas the SLOW path keeps the current large during a high-to-low load step. The dynamic current shoots up to quite a high level as it is combined with adaptive biasing. When the proposed technique is implemented in the 0.18-μm CMOS technology, the experimental results show the effective reduction in the undershoot (67%) and the overshoot (66.7%) while maintaining a low quiescent current of 1.1 μA. The settling times during 0-50-mA and 50-0-mA load transients are improved by 74% and 99.9%, respectively.
Keywords :
CMOS integrated circuits; voltage regulators; CMOS technology; adaptive bias loop fast path; adaptive bias loop slow path; adaptively biased low dropout regulator; current injection; dynamic slew enhancement technique; low-to-high load transient; size 0.18 mum; transient response; Bandwidth; Logic gates; Materials; Regulators; Resistance; Transient analysis; Transient response; Current mirror; Low drop-out regulator; current mirror; gain enhancement; low quiescent current; low-dropout regulator; operational transconductance amplifier; transconductance amplifier (OTA);
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2015.2415311