DocumentCode :
1110112
Title :
Minimum Two-Level Threslold Gate Realizations
Author :
Carroll, B.D. ; Coates, Clarence L., Jr.
Author_Institution :
Department of Electric Engineering, Auburn University
Issue :
10
fYear :
1972
Firstpage :
1086
Lastpage :
1098
Abstract :
This paper deals with the synthesis of two-level networks of threshold gate logic elements for realization of nonlinearly separable switching functions. The realization obtained contains the minimum number of threshold logic elements possible for a two-level realization. An algorithm based on the tree procedure of Coates and Lewis is developed which can be used to obtain the desired network realization for a given switching function. The function may be incompletely specified.
Keywords :
Algorithms, computers, minimal realizations, nonlinearly separable functions, switching theory, threshold logic.; Arithmetic; Boolean functions; Logic devices; Logic gates; Network synthesis; Network topology; Sufficient conditions; Algorithms, computers, minimal realizations, nonlinearly separable functions, switching theory, threshold logic.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/T-C.1972.223455
Filename :
1672048
Link To Document :
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