IIB-1 1.25-µm buried-oxide SOI/CMOS process for 16K/64K SRAMS

Author

Chen, Chiao-En ; Matloubian, M. ; Mao, B.-Y. ; Sundaresan, R. ; Slawinski, C. ; Lam, H.W. ; Hite, L.R. ; Hester, R.K.

Volume

Issue

fYear

1986

fDate

11/1/1986 12:00:00 AM

Firstpage

1840

Lastpage

1841

Keywords

CMOS process; CMOS technology; Fabrication; Implants; MOSFETs; Nitrogen; Process design; Random access memory; Silicon; Substrates;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

DOI

10.1109/T-ED.1986.22763

Filename

1485980

Link To Document