DocumentCode
1110610
Title
Low-voltage, four-quadrant, analogue CMOS multiplier
Author
Allen, P.E.
Volume
30
Issue
13
fYear
1994
fDate
6/23/1994 12:00:00 AM
Firstpage
1044
Lastpage
1045
Abstract
A CMOS four quadrant analogue multiplier that can operate from a supply voltage of 1.5 V is described. The multiplier requires two linear transconductors whose input transistors are operated in their linear region. Simulation results indicate that the nonlinearity can be kept below 0.8%, across the entire differential input voltage range of ±400 mV
Keywords
CMOS integrated circuits; analogue processing circuits; linear integrated circuits; linear network synthesis; multiplying circuits; signal processing equipment; 1.5 V; 400 mV; differential input voltage range; input transistors; linear region; linear transconductors; low-voltage four-quadrant analogue CMOS multiplier; simulation results; supply voltage;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19940740
Filename
294787
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