DocumentCode
1110842
Title
A Parallel Structure for Signed-Number Multiplication and Addition
Author
De Mori, R. ; Serra, A.
Author_Institution
Istituto di Elettrotecnica, Politecnico di Torino
Issue
12
fYear
1972
Firstpage
1453
Lastpage
1454
Abstract
An algorithm for performing signed-number multiplications using positive-number full multipliers is presented. It leads to very simple input-and output-correcting networks which are cellular iterative and introduce negligible additional delay.
Keywords
Cellular arrays, parallel multipliers, signed-number multiplication.; Added delay; Adders; Arithmetic; Cellular networks; Circuits; Iterative algorithms; Logic arrays; Magnetooptic recording; Cellular arrays, parallel multipliers, signed-number multiplication.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/T-C.1972.223525
Filename
1672118
Link To Document