350-V analog-digital compatible power IC´s using dielectrically isolated substrates

Using a dielectric isolation process, 350-V analog-digital compatible power IC technologies were developed. Good complemental electrical characteristics were achieved by vertical n-p-n and new lateral p-n-p transistors, and the transistor noise was reduced by removing crystal defects specific to dielectrically isolated wafers. Furthermore, high accuracy of resistance was achieved by a symmetrical layout. The technologies were applied to the development of a high-voltage power IC for telecommunication uses.