DocumentCode
1112609
Title
Multiple Fault Detection in Combinational Circuits: Algorithms and Computational Results
Author
Du, Min-Wen ; Weiss, C.Dennis
Author_Institution
College of Engineering, National Chiao Tung University
Issue
3
fYear
1973
fDate
3/1/1973 12:00:00 AM
Firstpage
235
Lastpage
240
Abstract
A new approach is developed for finding multiple fault detection tests under quite arbitrary fault models. Computational results are reported and discussed.
Keywords
Combinational logic networks, computational experiments, fault detection, fault tree, function verification, multiple faults.; Circuit faults; Circuit testing; Combinational circuits; Computer networks; Computer science; Electrical fault detection; Fault detection; Fault trees; Intelligent networks; Logic; Combinational logic networks, computational experiments, fault detection, fault tree, function verification, multiple faults.;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/T-C.1973.223700
Filename
1672293
Link To Document