DocumentCode :
1112912
Title :
A high-efficiency strongly self-checking asynchronous datapath
Author :
Yang, Jing-ling ; Choy, Chiu-Sing ; Chan, Cheong-Fat ; Pun, Kong-Pong
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ., China
Volume :
23
Issue :
10
fYear :
2004
Firstpage :
1484
Lastpage :
1494
Abstract :
This work examines the inherent self-checking (SC) property of latch-free dynamic asynchronous datapath (LFDAD) using differential cascode voltage switch logic. Consequently, a highly efficient SC dynamic asynchronous datapath architecture is presented. In this architecture, no hardware needs to be added to the datapath to achieve SC. The presented implementation is efficient in terms of speed and area and represents a new approach to fault-tolerant design.
Keywords :
automatic testing; circuit optimisation; logic circuits; logic design; DCVSL; LFDAD; SC dynamic asynchronous datapath architecture; differential cascode voltage switch logic; dynamic circuits; fault-tolerant design; latch-free dynamic asynchronous datapath; self-checking asynchronous datapath; Asynchronous circuits; Circuit faults; Circuit testing; Electrical fault detection; Fault detection; Hardware; Logic circuits; Switches; Switching circuits; Voltage; Asynchronous datapath; DCVSL; SC; differential cascode voltage switch logic; dynamic circuits; self-checking;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2004.835129
Filename :
1336958
Link To Document :
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