Title :
High drive current NMOS with Si-SiGe heterostructure low electric field channel
Author :
Shima, M. ; Hatada, A. ; Shimamune, Y. ; Katakami, A. ; Hori, M. ; Kojima, M. ; Kase, M. ; Hashimoto, K. ; Mishima, Y. ; Nakamura, S.
Author_Institution :
Fujitsu Labs. Ltd., Tokyo, Japan
Abstract :
A drive-current enhancement in NMOS with a compressively strained SiGe structure, which had been a difficult challenge for CMOS integration with strained SiGe high-hole-mobility PMOS, was successfully achieved using a Si-SiGe heterostructure low electric field channel of optimum thickness. A 4-nm-thick Si low-field-channel NMOS with a 4-nm-thick Si/sub 0.8/Ge/sub 0.2/ layer improved drive current by 10% with a 20% reduction in gate leakage current compared with Si-control, while suppressing threshold-voltage rolloff characteristic degradation, and demonstrated excellent I/sub on/--I/sub off/ characteristics of I/sub on/ = 1 mA/μm for I/sub off/ = 100 nA/μm. These results are the best in ever reported NMOS with a compressively strained SiGe structure and indicate that a Si-SiGe heterostructure low-field-channel NMOS integrated with a compressively strained SiGe channel PMOS is a promising candidate for high-speed CMOS in 65-nm node logic technology.
Keywords :
CMOS integrated circuits; Ge-Si alloys; MOSFET; elemental semiconductors; leakage currents; semiconductor materials; silicon; CMOS; NMOS; PMOS; Si-SiGe; SiO/sub 0.8/Ge/sub 0.2/ layer; drive-current enhancement; gate leakage current; heterostructure low electric field channel; node logic technology; threshold voltage rolloff; Boron; CMOS technology; Degradation; Electron mobility; Germanium silicon alloys; Implants; Insulation; MOS devices; Silicon germanium; Threshold voltage;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2004.835793