DocumentCode :
1113479
Title :
On the design of unilateral dual-loop feedback low-noise amplifiers with simultaneous noise, impedance, and IIP3 match
Author :
Van der Heijden, Mark P. ; De Vreede, Leo C N ; Burghartz, Joachim N.
Author_Institution :
Lab. of High-Frequency Technol. & Components, Delft Univ. of Technol., Netherlands
Volume :
39
Issue :
10
fYear :
2004
Firstpage :
1727
Lastpage :
1736
Abstract :
This work describes the theory and design of a nonenergetic dual-loop feedback low-noise amplifier (LNA) that provides maximum unilateral gain and simultaneous noise and impedance matching conditions. The dual-loop feedback is implemented in the form of transformer current-feedback and inductive series feedback (emitter degeneration). The current-feedback transformer is also used to neutralize the base-collector capacitance (Cbc), by combining it with a properly dimensioned shunt admittance at the collector output. The result is a single-transistor unilateral-gain amplifier with high isolation and good stability, eliminating the need for a cascode stage and thus enableing the use of a lower dc-supply voltage. For the complete LNA, simple design equations are derived for the unilateralization, noise, and impedance matching requirements. Finally, second-harmonic tuning at the source improves the linearity without compromising the simultaneous noise and impedance match. To verify the presented theory, a 900-MHz hybrid Si BJT LNA has been implemented, which achieves 1.3-dB noise figure, 15-dB gain, -55dB isolation, and +10dBm IIP3 using a conventional double poly transistor, consuming IC=2.5 mA at VCE=1.5 V.
Keywords :
bipolar transistors; feedback amplifiers; hybrid integrated circuits; impedance matching; radiofrequency amplifiers; radiofrequency integrated circuits; semiconductor materials; silicon; 1 to 5 V; 1.3 dB; 15 dB; 2.5 mA; DC supply voltage; IIP3 match; IM3; Si-SiGe analog circuit design; base-collector capacitance; cascode stage; collector output; current-feedback transformer; double polytransistor; emitter degeneration; hybrid Si BJT LNA; impedance matching; inductive series feedback; low noise amplifier; low-noise amplifiers; negative feedback amplifier; noise matching; nonenergetic dual-loop feedback; radio-frequency integrated circuit design; second-harmonic tuning; shunt admittance; single-transistor amplifier; third-order intermodulation distortion; unilateral dual-loop feedback; unilateral-gain amplifier; Admittance; Capacitance; Equations; Feedback; Impedance matching; Linearity; Low-noise amplifiers; Noise figure; Stability; Voltage; IM; LNA; Linearity; Si-SiGe analog circuit design; low noise amplifier; negative feedback amplifier; noise matching; radio-frequency integrated circuit design; third-order distortion; third-order intermodulation distortion;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2004.833759
Filename :
1337004
Link To Document :
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