Title :
Vertical enhancement-mode InP MISFET´s fabricated on n-type substrate
Author :
Cheng, Chu-Liang ; Ota, Yusuke ; Tell, Benjamin ; Zilko, John L. ; Forrest, Stephen R. ; Fleming, James W.
Author_Institution :
AT&T Bell Laboratories, Murray Hill, NJ
fDate :
9/1/1986 12:00:00 AM
Abstract :
We report a new vertical structure InP enhancement-mode MISFET. These transistors are made on an Fe-doped semi-insulating InP epitaxial layer grown by organometallic vapor-phase epitaxy (OMVPE) on an n-type InP substrate. Thermally evaporated borosilicate is used as the gate insulator. Transconductances as high as 100 mS/mm have been achieved with a gate length of approximately 2.8µm. The novelty and potential advantages of the vertical structure are discussed.
Keywords :
Electron mobility; Epitaxial growth; Etching; FETs; Implants; Indium phosphide; Insulation; MISFETs; Substrates; Thermal conductivity;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/EDL.1986.26468
