A device model for the amorphous-silicon staggered-electrode thin-film transistor

A model for the amorphous-silicon (a-Si) staggered-electrode thin-film transistor (TFT) that incorporates gate-voltage dependent mobility for channel current and space-charge-limited current effects for the source and drain contacts is discussed. This model is in excellent agreement with TFT data over a wide range of applied voltages and for various channel lengths. For the devices measured, the TFT current depends more sensitively on effective channel mobility than on space-charge-limited current through the a-Si layer, but the latter is responsible for current crowding at low drain voltage. Because of the two-dimensional current flow under the contacts, their equivalent lumped element model exhibits a different power law behaviour than that for one-dimensional current flow in an n⁺-i-n⁺ structure. It also shows that a peak in the differential conductance curve at low drain voltage is a sensitive indicator of current crowding and implies a superlinear equivalent lumped element in series with the intrinsic TFT