DocumentCode
1114674
Title
Can Analog PLLs Hold Lock? A Paradox Explored [Open Column]
Author
Gardner, F.M.
Volume
7
Issue
3
fYear
2007
Firstpage
46
Lastpage
52
Abstract
This article has extended the methods of earlier workers to devise formulas that predict the variance of phase-error accumulation in type-1 PLLs in response to h3/f3 phase noise. The formulas are in terms of engineering specifications of the PLLs and of measurable specifications of phase noise spectra. Numerous approximations have been made so that the formulas cannot be expected to be highly accurate. More significantly, the analysis does not prove that the phase error accumulation actually occurs; the theory that implicitly underlies the formulas may not be valid under the conditions postulated. An experiment to test the predictions would be a worthy project.
Keywords
circuit noise; phase locked loops; phase noise; PLL; phase lock loop circuit; phase noise spectra; phase-error accumulation; Communication system control; Optical feedback; Optical noise; Optical receivers; Optical transmitters; Phase locked loops; Phase noise; Stress; Voltage-controlled oscillators;
fLanguage
English
Journal_Title
Circuits and Systems Magazine, IEEE
Publisher
ieee
ISSN
1531-636X
Type
jour
DOI
10.1109/MCAS.2007.904179
Filename
4299397
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