• DocumentCode
    1115186
  • Title

    Tessellation Aspect of Combinational Cellular Array Testing

  • Author

    Sung, Chia-Hsiaing ; Coates, Clarence L., Jr.

  • Author_Institution
    Department of Electrical Engineering and the Coordinated Science Laboratory, University of Illinois
  • Issue
    4
  • fYear
    1974
  • fDate
    4/1/1974 12:00:00 AM
  • Firstpage
    363
  • Lastpage
    369
  • Abstract
    This paper introduces procedures which enable one to settle the tessellation problem for the class of combinational cellular arrays with each cell having a binary horizontal input and a binary vertical input. Where all input combinations are applicable to all cells in the array in this class, the necessary number of tests is obtained from necessary prime as well as composite tessellations.
  • Keywords
    Cellular array, combinational logic, fault detection, tessera, tessellation.; Fault detection; Fault diagnosis; Logic arrays; Logic testing; Cellular array, combinational logic, fault detection, tessera, tessellation.;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/T-C.1974.223951
  • Filename
    1672544
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1115186