DocumentCode :
1115187
Title :
Diophantine Frequency Synthesis for Fast-Hopping, High-Resolution Frequency Synthesizers
Author :
Sotiriadis, Paul Peter
Author_Institution :
Johns Hopkins Univ., Baltimore
Volume :
55
Issue :
4
fYear :
2008
fDate :
4/1/2008 12:00:00 AM
Firstpage :
374
Lastpage :
378
Abstract :
The application of the diophantine frequency synthesis (DFS) methodology is presented and certain practical aspects of it are illustrated through the design and frequency planning of two forward DFS synthesizers each using two Integer-N phase-locked loops (PLLs). Both synthesizers achieve frequency resolution about 100 times times better that their constituent PLLs without compromising hopping speed performance or spectral purity.
Keywords :
frequency synthesizers; phase locked loops; diophantine frequency synthesizers; frequency planning; hopping speed performance; integer-N phase-locked loops; spectral purity; Diophantine equation; frequency hopping; frequency synthesis; frequency synthesizer; number theory; phase-locked loop (PLL); timing systems; wireless;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2008.919499
Filename :
4479505
Link To Document :
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