Title :
A Generalized Pipeline Array
Author :
Kamal, A.K. ; Singh, Harpreet ; Agrawal, D.P.
Author_Institution :
Department of Electronics and Communication Engineering, University of Roorkee
fDate :
5/1/1974 12:00:00 AM
Abstract :
A generalized pipeline cellular array has been proposed which can perform all the basic operations such as multiplication, division, squaring, and square rooting. The different modes of operation are controlled by a single control line. An expression for time delay has been obtained. Further, it has been shown that these arithmetic operations can be overlapped in the pipe in any desired sequence, and thus significant speed improvement can be achieved. The array is fully iterative and hence is suitable for large-scale integration (LSI).
Keywords :
Adder/subtractor cell, division, fully iterative, latch circuits, multiplication, pipeline, squares, square-root, 2´s complement.; Arithmetic; Clocks; Communication system control; Costs; Delay effects; Large scale integration; Latches; Logic arrays; Pipeline processing; Pulse circuits; Adder/subtractor cell, division, fully iterative, latch circuits, multiplication, pipeline, squares, square-root, 2´s complement.;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/T-C.1974.223977
