Title :
Statistical simulations for flash memory reliability analysis and prediction
Author :
Larcher, Luca ; Pavan, Paolo
Author_Institution :
Dipt. di Sci. e Metodi dell´´Ingegneria & INFM, Univ. di Modena e Reggio Emilia, Italy
Abstract :
In this paper, through the use of a recently proposed statistical model of stress-induced leakage current, we will investigate the reliability of actual flash memory technologies and predict future trends. We investigate either program disturbs (namely gate and drain disturbs) and data retention of state-of-the-art flash memory cells and use this model to correlate the induced threshold voltage shift to the typical outputs coming from oxide characterization, that are density, cross section, and energy level of defects. Physical mechanisms inducing the largest threshold voltage (VT) degradation will be identified and explained. Furthermore, we predict the effects of tunnel oxide scaling on flash memory data retention, giving a rule of thumb to scale the tunnel oxide while maintaining the same retention requirements.
Keywords :
failure analysis; flash memories; integrated circuit modelling; integrated circuit reliability; integrated memory circuits; semiconductor storage; statistical analysis; device simulations; drain disturbs; flash memories; flash memory cells; flash memory data retention; flash memory reliability analysis; flash memory reliability prediction; gate disturbs; oxide characterization; semiconductor device reliability; semiconductor memories; statistical model; statistical simulations; stress-induced leakage current; threshold voltage shift; tunnel oxide scaling; Analytical models; Current measurement; Degradation; Failure analysis; Flash memory; Flash memory cells; Leakage current; Predictive models; Stress measurement; Threshold voltage; Device simulations; Flash memories; semiconductor device reliability; semiconductor memories;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2004.835023