DocumentCode
1115664
Title
A self-aligned process for high-voltage, short-channel vertical DMOSFETs in 4H-SiC
Author
Matin, Maherin ; Saha, Asmita ; Cooper, James A., Jr.
Author_Institution
Birck Nanotechnology Center, Purdue Univ., West Lafayette, IN, USA
Volume
51
Issue
10
fYear
2004
Firstpage
1721
Lastpage
1725
Abstract
In this paper, we describe a self-aligned process to produce short-channel vertical power DMOSFETs in 4H-SiC. By reducing the channel length to ≤0.5 μm, the specific on-resistance of the MOSFET channel is proportionally reduced, significantly enhancing performance.
Keywords
power MOSFET; semiconductor doping; semiconductor process modelling; silicon compounds; wide band gap semiconductors; 4H-SiC; DMOS; MOSFET channel; NO; SiC; counter-doping; high-voltage DMOSFET; high-voltage MOSFET; nitric oxide anneal; self-aligned process; short-channel vertical power DMOSFET; specific on-resistance; Anisotropic magnetoresistance; Annealing; Doping profiles; Electron mobility; MOSFET circuits; Oxidation; Photonic band gap; Power MOSFET; Silicon carbide; Voltage; Counter-doping; DMOS; NO; SiC; anneal; high-voltage MOSFET; nitric oxide; self-aligned; short-channel;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2004.835622
Filename
1337186
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