Fault-Tolerance of the Iterative Cell Array Switch for Hybrid Redundancy

Author

Ogus, Roy C.

Author_Institution

Digital Systems Laboratory, Stanford University

Issue

fYear

1974

fDate

7/1/1974 12:00:00 AM

Firstpage

667

Lastpage

681

Abstract

The technique of hybrid redundancy has been used to protect those portions of a digital system which have to be made ultrareliable. Siewiorek and McCluskey have presented a new switch design for hybrid redundancy which is shown to be of less complexity than other switch designs presented in the literature.

Keywords

Computer reliability, error-correcting codes, fail-safe logic, fault-tolerance, hybrid redundancy, iterative cell array, mission time, self-checking checker, threshold voter, triple modular redundancy (TMR).; Detectors; Digital systems; Fault tolerance; Fault tolerant systems; Hardware; Nuclear magnetic resonance; Protection; Redundancy; Reliability; Switches; Computer reliability, error-correcting codes, fail-safe logic, fault-tolerance, hybrid redundancy, iterative cell array, mission time, self-checking checker, threshold voter, triple modular redundancy (TMR).;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/T-C.1974.224015

Filename

1672608

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1115851