Embeded EEPROM Memory Achieving Lower Power - New design of EEPROM memory for RFID tag IC

Author

Dong-Sheng, Liu ; Xue-cheng, Zou ; Fan, Zhang ; Min, Deng

Author_Institution

Dept. of Electron. Sci. & Technol., Huazhong Univ. of Sci. & Technol., Wuhan

Volume

22

Issue

6

fYear

2006

Firstpage

53

Lastpage

59

Abstract

A 2-kb embedded EEPROM memory, operating over a wide voltage range (typically 2.5 V-5 V), was designed and fabricated using the SMIC 0.35-mum 2P3M CMOS embedded EEPROM process. The chip size is about 0.6 mm². The method of adding control transistors improved the static power dissipation. The transient power consumption of the charge pump circuit was greatly reduced by using a slowly varying clock. The proposed SA using a voltage sensing method also significantly improved the read power dissipation. By employing these techniques, a low-power embedded EEPROM memory with 40 muA read current and 250 muA page write current was developed, that achieved much lower power than EEPROM memory designs reported in scientific journals or conferences. This EEPROM memory was used in the ISO/IEC 15693-compatible RFID tag IC project

Keywords

CMOS integrated circuits; EPROM; integrated circuit layout; integrated memory circuits; low-power electronics; radiofrequency identification; radiofrequency integrated circuits; 0.35 micron; 2 kByte; 2.5 to 5 V; 250 muV; 40 muA; EEPROM memory; ISO/IEC 15693; RFID tag IC; SMIC 2P3M CMOS; charge pump circuit; clock; control transistors; embedded memory; static power dissipation; transient power consumption; voltage sensing method; CMOS integrated circuits; CMOS process; Charge pumps; Clocks; EPROM; Energy consumption; Power dissipation; RFID tags; Read-write memory; Voltage;

fLanguage

English

Journal_Title

Circuits and Devices Magazine, IEEE

Publisher

ieee

ISSN

8755-3996

Type

jour

DOI

10.1109/MCD.2006.307277

Filename

4099517