Theoretical analysis of the layer design of inverted single-channel heterostructure transistors

In this paper the inverted heterostructure transistor is analyzed using a self-consistent model for calculation of the electron concentration and spatial distribution in the quantum well. The (In,Ga)As/(Al,Ga) As material system is considered in particular. The objective of the study is to design a transistor with a high channel electron concentration and a short gate-to-channel distance. It furthermore is desired that the channel concentration can be selected without influence from the gate-to-channel distance. Placing the gate close to the channel means that the leakage current may become unacceptably high. The analysis therefore includes an estimate of the leakage current that can be expected for each structure. It is shown that the best way of meeting the design objectives is to use a material between the channel and the gate, which consists of two layers with low- and high-bandgap materials, respectively. The structure will thus consist of a potential well with the electron accumulation occurring at the lower interface. The lower high-bandgap material furthermore should be doped as high as possible. The upper limit for the doping level in the topmost layer is determined by the maximum acceptable gate leakage as well as by gate-drain breakdown. (The latter also being partly determined by the device contact geometry.) Governed by the restrictions imposed by the application of the transistor, the model can thus be used to optimize the layer design for, e.g., minimum noise figures.