• DocumentCode
    1118411
  • Title

    Efficient method for alleviating voltage limit violations using local optimisation

  • Author

    Bhanot, V. ; Gupta, H. ; Sharma, J.

  • Author_Institution
    Dept. of Electr. Eng., Roorkee Univ., India
  • Volume
    141
  • Issue
    4
  • fYear
    1994
  • fDate
    7/1/1994 12:00:00 AM
  • Firstpage
    279
  • Lastpage
    284
  • Abstract
    Alleviation of voltage limit violation at certain critical buses is a serious problem in the interconnected power system. In this paper, an attempt is made, based on the concept of local optimisation, to alleviate the voltage limit violation by using controls at the local level during any severe disturbance to avoid system collapse. The method is efficient and robust in comparison with existing methods, as the new secure operating point is obtained with minimum control action. The algorithm developed in this paper gives satisfactory results when tested under steady-state conditions on 24 bus IEEE (RTS) and 57 bus IEEE systems under severe and extreme loading conditions
  • Keywords
    optimisation; power system control; power system interconnection; 24 bus IEEE system; 57 bus IEEE system; critical buses; extreme loading conditions; interconnected power system; local optimisation; severe disturbance; severe loading conditions; steady-state conditions; system collapse avoidance; voltage limit violations alleviation;
  • fLanguage
    English
  • Journal_Title
    Generation, Transmission and Distribution, IEE Proceedings-
  • Publisher
    iet
  • ISSN
    1350-2360
  • Type

    jour

  • DOI
    10.1049/ip-gtd:19949965
  • Filename
    296503