DocumentCode
1118445
Title
Modeling and characterization of CMOS-compatible high-voltage device structures
Author
Arpia, Zahirp ; Salama, C. Andre T ; Hadaway, Robert A.
Author_Institution
University of Toronto, Toronto, Ontario, Canada
Volume
34
Issue
11
fYear
1987
fDate
11/1/1987 12:00:00 AM
Firstpage
2335
Lastpage
2343
Abstract
The design, implementation, and modeling of high-voltage MOS transistors in a Standard CMOS technology is described. High voltage n- and p-channel transistors, with breakdown voltages of 50 and 180 V, respectively, have been fabricated. A SPICE-compatible model for these transistors is described, and its accuracy verified by comparison with experimental results.
Keywords
Breakdown voltage; CMOS process; CMOS technology; Circuit simulation; Costs; Design optimization; MOSFETs; Semiconductor device modeling; Telecommunications; Voltage control;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/T-ED.1987.23241
Filename
1486952
Link To Document