DocumentCode :
1118695
Title :
Two-level partitioning algorithm with stable performance
Author :
Yang, W.-P. ; Ker, J.-S. ; Kuo, Y.-H. ; Ho, Y.-K.
Author_Institution :
Telecommun. Lab., Minist. of Commun., Chung-Li, Taiwan
Volume :
141
Issue :
3
fYear :
1994
fDate :
6/1/1994 12:00:00 AM
Firstpage :
197
Lastpage :
202
Abstract :
By using the concept of `divide-and-conquer´ the complexity of a large problem can be reduced efficiently. Therefore, logic partitioning plays an important role in many aspects of VLSI design. The ratio cut objective function has attracted much attention because it coordinates the two traditional goals of logic partitioning, mincut and equipartition, automatically. How to reduce the total trials needed to run and maintain the quality of solutions is very important to the iterative improvement-based partitioning algorithms. In this paper we present a ratio cut partitioning algorithm which provides stable results without executing the algorithm over many trials. The proposed algorithm also employs a preprocessing circuit-clustering procedure to improve the performance. Our partitioning heuristics were tested on some industry benchmark suites. Good experimental results, which are better than those obtained by RCut1.0 and EIG1-IG algorithms, have been observed
Keywords :
VLSI; circuit layout CAD; iterative methods; logic CAD; VLSI design; divide/conquer concept; equipartition; iterative improvement-based partitioning algorithms; logic partitioning; mincut; preprocessing circuit-clustering procedure; ratio cut objective function; ratio cut partitioning algorithm; stable performance; two-level partitioning algorithm;
fLanguage :
English
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
Publisher :
iet
ISSN :
1350-2409
Type :
jour
DOI :
10.1049/ip-cds:19941024
Filename :
296530
Link To Document :
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