A Hybrid-Domain Two-Step Time-to-Digital Converter Using a Switch-Based Time-to-Voltage Converter and SAR ADC

In this brief, an energy-efficient time-to-digital converter (TDC) using a hybrid of time- and voltage-domain circuits is presented. The proposed TDC operates in two steps, i.e., first in the time domain by using a delay-line TDC and then in the voltage domain by using a successive-approximation-register analog-to-digital converter. The time residue of the first stage is converted to voltage by using a switch-based time-to-voltage converter (TVC) that eliminates the need for a current source with large output impedance. To improve the linearity of the proposed TVC, pseudodifferential time-domain signaling is presented. A prototype chip fabricated in the 65-nm CMOS achieves 630 fs of time resolution at 120 megasamples/s while consuming 3.7 mW from a 1.2-V supply. The figure of merit is 244 fJ/conversion-step, which is the best among the recently published high-speed TDCs.